09-21-2018, 07:14 PM
(This post was last modified: 09-21-2018, 07:14 PM by Guido1982.
Edit Reason: disable smilies
)
Just for fun I wrote a regular expression that would assert and capture a vtlib expression in 'normal' and 'poorly' written formats. I also tested some deliberately wrong formatted ones. Tested them on https://www.regexpal.com/. The expression is:
The 'right' variations I came up with are:
$(reffield : (ModuleName) field)
$(reffield: (ModuleName) field)
$(reffield :(ModuleName) field)
$(reffield:(ModuleName) field)
$(reffield : (ModuleName)field)
$(reffield: (ModuleName)field)
$(reffield :(ModuleName)field)
$(reffield:(ModuleName)field)
The 'wrong' ones I tested are:
$reffield: (ModuleName) field
$(reffield) : ModuleName (field)
$(retfield : ModuleName field)
Maybe we could use this one day, or just for fun keep coming up with correctly formatted or incorrectly formatted ones.
PHP Code:
\$\((\w+) ?: ?\((\w+)\) ?(\w+)\)
The 'right' variations I came up with are:
$(reffield : (ModuleName) field)
$(reffield: (ModuleName) field)
$(reffield :(ModuleName) field)
$(reffield:(ModuleName) field)
$(reffield : (ModuleName)field)
$(reffield: (ModuleName)field)
$(reffield :(ModuleName)field)
$(reffield:(ModuleName)field)
The 'wrong' ones I tested are:
$reffield: (ModuleName) field
$(reffield) : ModuleName (field)
$(retfield : ModuleName field)
Maybe we could use this one day, or just for fun keep coming up with correctly formatted or incorrectly formatted ones.